The present invention disclosed herein relates to a radio frequency (RF) amplifier, and more particularly, to an RF amplifier including a bias circuit of which current amount varies with a level of an output power.
The present invention has been derived from research undertaken as a part of the information technology (IT) development business by the Ministry of Information and Communication and Institute for Information Technology Advancement of the Republic of Korea [Project management No.: 2005-S-017-0, Project title: ultra-low power RF/HW/SW integrated SoC].
High quality telecommunication can be realized using a method of increasing an output of a transmitter or a method of enhancing sensitivity of a receiver. However, the method of increasing an output of a transmitter is not preferable due to a limitation in effect on equipment and power capacity at an output terminal of the transmitter, economy, and the like. For this reason, the method of enhancing sensitivity of a receiver is more preferably used to realize high quality telecommunication. The sensitivity of the receiver may be represented as noise figure (NF) indicating a degree of a receiving signal separated from a noise. As the noise figure is smaller, the sensitivity is higher in general.
With the rapid development of various mobile telecommunication technologies using a frequency bandwidth of 400 MHz to 2.5 GHz, it becomes more important to develop radio frequency (RF) devices and design technologies. Since an RF amplifier has several disadvantageous such as a parasitic capacitor and a silicon substrate causing a lot of signal loss, and low breakdown voltage, there is a limitation in that the RF amplifier is applied to a system requiring higher linearity and output power than a compound device made of GaAs, InGaP, InP, etc. Therefore, it is inevitable to improve a typical RF amplifier driven by a constant current regardless of an output power level when considering a recent technology development trend to require the extension of an operating time of a terminal by optimizing current consumption at a low output power level and a high output power level.
A method of enhancing linearity of an RF amplifier may be mainly classified into two kinds, of which one is a method of canceling nonlinearly-generated components such as 3rd intermodulation distortion (IMD3), and another is a method of increasing 1-dB gain compression point (P1 dB) of an output power in the same circuit. Here, the 3rd intermodulation distortion (IMD3) is defined as the magnitude of a distortion signal generated due to intermodulation, and the 1-db gain compression point (P1 dB) is defined as an output power at the point where the output power of a real gain curve is 1 dB below the value of an extrapolated linear gain curve.
A typical RF amplifier includes a structure with high resistance to prevent the leakage of an RF signal, or a bias circuit of a current mirror structure. Such a bias circuit maintains a gate-source voltage (Vgs) of an input transistor constantly.
The bias circuit of the typical RF amplifier supplies a bias voltage and current regardless of input/output power. However, there is a difference in a current ratio of a current flowing through a main circuit of the RF amplifier to a current supplied from the bias circuit depending on a power level. For this reason, the typical RF amplifier has nonlinearity as an output power increases. Further, the maximum output power of a transistor used in the RF amplifier also decreases.